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ISL29011
Command Register I 00(hex)
The first command register has the following functions:
range, Scheme 1 proximity detection is less affected by the
ambient IR noise variation.
1. Operation Mode: Bits 7, 6, and 5. These three bits determine
the operation mode of the device.
TABLE 2. OPERATION MODE
BIT 7
0
TABLE 5. PROXIMITY SENSING SCHEME
OPERATION
Sensing IR from LED and ambient
BITS 7 TO 5
000
OPERATION
Power-down the device
1
Sensing IR from LED with ambient IR rejection
001
ALS once
2. Modulation Frequency: Bit 6. This bit sets the IR LED driver’s
modulation frequency.
010
011
100
101
110
111
IR once
Proximity once
Reserved (Do not use)
ALS continuous
IR continuous
Proximity continuous
BIT 6
0
1
TABLE 6. MODULATION FREQUENCY
MODULATION FREQUENCY
(kHz)
DC
360
3. Amplitude of IR driver current: Bits 5 and 4. This device
2. Interrupt flag; Bit 2. This is the status bit of the interrupt. The bit
is set to logic high when the interrupt thresholds have been
triggered, and logic low when not yet triggered. Once triggered,
INT pin stays low and the status bit stays high. Both interrupt
pin and the status bit are automatically cleared at the end of
Command Register I transfer.
provides current source to drive an external IR LED. The drive
capability can be programmed through Bits 5 and 4. For
example, the device sources 12.5mA out of the IRDR pin if
Bits 5 and 4 are 0.
TABLE 7. CURRENT SOURCE CAPABILITY AT IRDR PIN
TABLE 3. INTERRUPT FLAG
BITS 5 TO 4
IRDR PIN SOURCE CURRENT
BIT 2
0
1
OPERATION
Interrupt is cleared or not triggered yet
Interrupt is triggered
00
01
10
11
12.5mA IR LED driver
25mA IR LED driver
50mA IR LED driver
100mA IR LED driver
3. Interrupt persist; Bits 1 and 0. The interrupt pin and the
interrupt flag is triggered/set when the data sensor reading is
out of the interrupt threshold window after m consecutive
number of integration cycles. The interrupt persist bits
determine m.
TABLE 4. INTERRUPT PERSIST
4. Resolution: Bits 3 and 2. Bits 3 and 2 determine the ADC’s
resolution and the number of clock cycles per conversion in
Internal Timing Mode. Changing the number of clock cycles
does more than just change the resolution of the device. It also
changes the integration time, which is the period the device’s
analog-to-digital (A/D) converter samples the photodiode
BITS 1 TO 0
00
NUMBER OF INTEGRATION CYCLES
1
.
current signal for a measurement.
TABLE 8. RESOLUTION/WIDTH
01
10
11
4
8
16
BITS 3 TO 2
00
01
NUMBER OF CLOCK CYCLES
2 16 = 65,536
2 12 = 4,096
n-BIT ADC
16
12
Command Register II 01(hex)
The second command register has the following functions:
10
11
2 8 = 256
2 4 = 16
8
4
1. Proximity Sensing Scheme: Bit 7. This bit programs the function
of the proximity detection. Logic 0 of this bit, Scheme 0, makes
full n (4, 8, 12, 16) bits (unsigned) proximity detection. The range
of Scheme 0 proximity count is from 0 to 2 n . Logic 1 of this bit,
Scheme 1, makes n-1 (3, 7, 11, 15) bits (2’s complementary)
proximity_less_ambient detection. The range of Scheme 1
proximity count is from -2 (n-1) to 2 (n-1) . The sign bit is extended
for resolutions less than 16. While Scheme 0 has wider dynamic
11
5. Range: Bits 1 and 0. The Full Scale Range (FSR) can be
adjusted via I 2 C using Bits 1 and 0. Table 9 lists the possible
values of FSR for the 499k ? R EXT resistor.
FN6467.5
October 10, 2012
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